Changing Interaction of Compiler and Architecture
نویسندگان
چکیده
W ith recent developments in compilation technology and architectural design, the line between traditional hardware and software roles has become increasingly blurred. The compiler can now see the processor's inner structure, which lets architects exploit sophisticated program analysis techniques to hide branch and memory access delays, for example. Processors can now implement register renaming and dynamic instruction scheduling algorithms directly in the hardware—something that was once exclusively the compiler's job. A similar shift is occurring in optimizing compilers for parallel machines. To parallelize a larger class of applications, compiler writers are moving beyond static transformations that are provably correct and exploring techniques that rely on runtime decisions or hardware support. This increased blurring of compile-time and runtime optimizations opens many new research opportunities, particularly for program optimization—a task typically performed entirely at compile time. In this article, we describe an optimization continuum with compile time and post-runtime as endpoints and show how different classes of optimizations fall within it. Most current commercial compilers are still at the compile-time end-point, and only a few research efforts are venturing beyond it. As the gap between architecture and compiler closes, there are also attempts to completely redefine the architecture-compiler interface to increase both performance and architectural flexibility. Program optimization is traditionally viewed as a task to be performed entirely at compile time. Compilers often have access to profile information and can consider platform-specific information when the code is translated. However, because they have no access to runtime information, they must make conservative assumptions so that the program will be correct under all possible runtime conditions. This limits the degree of optimization. At the other end of the continuum is optimization with knowledge of the runtime environment. Current superscalar microprocessors, for example, perform their own set of code optimizations, such as runtime instruction scheduling. The hardware has perfect knowledge of the runtime environment, but it has lost some analysis information that the compiler knew. This again limits optimization potential. Optimization during compile time consists of two phases. In the analysis phase, the compiler gathers information and evaluates if optimization is possible. If so, it then evaluates if the optimization will actually improve performance. In the second phase, transformation , if the compiler has determined that an optimization will improve performance, it transforms the code. Thus, a compiler analyzes and transforms the entire program statically. In a runtime optimization, on the other hand, the hardware …
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عنوان ژورنال:
- IEEE Computer
دوره 30 شماره
صفحات -
تاریخ انتشار 1997